Abstract
A self-aligned nickel-silicide process to reduce parasitic source and drain resistances in ultra-thin-body silicon-on-insulator (UTB-SOI)-MOSFETs is investigated. An optimized nickel-silicide process sequence including nickel sputter deposition, rapid thermal diffusion and compatible silicon nitride (Si3N4) spacers is demonstrated in UTB-SOI n-MOSFETs. Transistor on-currents and source/drain-resistivity are extracted from output and transfer characteristics and compared for various device layer thicknesses from 80 nm down to 15 nm. On-currents are improved up to a factor of 100 for the thinnest transistors by the introduction of self-aligned NiSi. Front and back gate interface qualities are extracted to evaluate their potential impact on mobility and on-currents specifically for ultra-thin devices.
Original language | English |
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Pages (from-to) | 497-502 |
Number of pages | 6 |
Journal | Microelectronic Engineering |
Volume | 82 |
Issue number | 3-4 SPEC. ISS. |
DOIs | |
Publication status | Published - Dec 2005 |
Externally published | Yes |
Keywords
- Nickel silicide
- SOI-MOSFET
- Salicide
- Ultra-Thin-Body (UTB)